2nd Austrian RISC-V Meetup @ SAL

Agenda (Draft)

Welcome Session and Keynotes

10:00    Welcome to the 2^nd Austrian RISC-V Meetup Willibald Krenn (SAL), Daniel Müller-Gritschneder (TU Wien)

10:15    Update from RISC-V Int. (TBD) Stefan Wallentowitz (RISC-V Int.)

10:45    RISC-V for Advanced Protocol Handling Heimo Hartlieb, Andreas Wallner (IFAT)

11:15    Coffee Break 

Session 1

11:30    TBD, Marcel Baunach (TU Graz)

11:45    RISC-V-based HW Accelerators @ SAL Ambily Suresh (SAL)

12:00    RISC-V Extensions for Enhancing the Physical and Logical Security of MCUs Marcel Medwed (NXP)

12:15    Performance and Complexity in Wide RISC-V Vector Implementation Florian Zaruba, Michael Platzer (Axelera):

12:30    Business Lunch & Networking

Session 2

13:00    TBD, Rene Windegger (LieberLieber)

13:15    Towards an Automated Toolchain and Fusion-based Instruction Identification for RISC-V Custom Extensions 
Daniel Müller-Gritschneder (TU Wien)

13:30    RISC-V and Khronos: Toward a Portable and Open Acceleration Ecosystem Jakob Zwirchmayr (TAAG)

13:45    Automated black box verfication of CPS Stefan Marksteiner (AVL)

14:00    The Austrian RISC-V Landscape and Strategy Marcus Borrmann, Daniel Müller-Gritschneder, Willibald Krenn

14:30    Discussion

15:00    Networking and Drinks

Programm Download